Τετάρτη, Δεκεμβρίου 08, 2004

CISC to RISC (and back again?)

Everybody knows that x86 chips are CISC chips. An everlasting battle between CISC and RISC fans has started to fade but the question remains, is there anything in common between a modern x86 processor, let's say the Pentium 4 , and the CISC remains of the past? Most readers will agree that modern x86 chips are essentially RISC cores with a CISC frontend and "emulated" extended instructions.

Looking at the x86 instruction set can be fun. Whole sets of instructions appear totally out of context today, for example, the ASCII adjust family (AAA, AAD, AAM, AAS), the decimal adjust family (DAA, DAS), the XLAT instruction and several others that have propably never been generated by a compiler. Consider the XLAT instruction, that translates a byte to another byte by using a lookup table. Using it would have been a shortcut to loading the register, calculating a memory address with it (remember that the 16-bit processors had very limited address calculation facilities, in stark contrast to the 386 and later processors) and loading the resulting value. Today the XLAT instruction is propably emulated and executes much slower than an explicit load-lookup-store sequence of generic RISC-like instructions. As a matter of fact, since the Pentium II many of these instructions are prohibitively slow and nobody noticed. In that sense, the x86 became RISC-like.

On the other hand, the x86 instruction set has grown significantly with a huge number of extensions: MMX, MMXext, 3dnow, 3dnow-ext, SSE, SSE2 and SSE3. Many more, relatively minor additions have also been made (anyone remember cmpxchg8b8?). The point is that all these extensions, especially the SIMD ones, are like the 16-bit remnants of the past in the fact that they address a very specific problem which we find significant today but which may also become trivial in the future or be solved in another way. In that sense, the x86 continues the CISC tradition by providing instructions for very specific tasks. However, things do change. If for example multi-core chips become popular it might be easier to have 16 simple cores than 2 complex ones. A simple core might be hard pressed to compute complex multi-unit instructions like MMX and SSE and prefer simpler RISC-like instructions. In that case a multi-threaded, instead of SIMD, approach may be much faster and the whole class of SIMD may be deprecated.

In the course of many years the x86 architecture has evolved significantly. The CISC heritage will never change but the modern Athlon64 in 64-bit mode is a much better processor not only in terms of performance but also by the quality of its design. The future is going to be a very interesting place.

PKT